Server D100 Processing Details¶

The D100, running on a server-class x86 processor, has a significantly different architecture than other Symetrix DSPs. As such, there are some differences with how processing is predicted and runs. These differences are discussed below.

In Radius NX, Prism and Edge, general purpose processing occurs on a single core, while special purpose processing like AEC and Super Matrix have a dedicated core or chip.

In Server D100, with a single large general-purpose processor, a second core is available for general-purpose processing while AEC and Super Matrix still have a dedicated core each as well. Since the general-purpose processing is split amongst these two cores, an advanced load-sharing algorithm was created to efficiently allocate modules, distributing the processing while minimizing latency.

This placement algorithm is run during the compile phase. Compiling a design can be run manually from the Hardware menu, or automatically when pushing a design. So it is important to understand that before compiling, Composer does not know which core each module will be run on, and thus the numbers reported for DSP usage and latency are just estimates.

After compiling a design, Composer will accurately report the DSP usage per core and the total DSP latency through the system. This is shown in the Device Properties in the Design View, and the Units section of a generated Report.

Tip: If a D100 design is running out of processing on the two general purpose cores, you may be able to gain more processing headroom by converting the largest matrix to use the Super Matrix, because it uses its own dedicated core.